Leuther A., Hollfelder M., Hardtdegen H., Luth H Experimental realization of a two-dimensional to two-dimensional tunnel transistor

Semiconductor Science and Technologyl.- 1996.- V. 11.- P. 772–775.- Printed in the UK.Abstract. We report on the fabrication of an InP-based two-dimensional to two-dimensional tunnel transistor with two modulation-doped strained In_0.75Ga_0.25As quantum wells of different thickness. The channels are separated by a 10 nm thick InP barrier. Source and drain contacts are realized by non-alloyed ohmic contacts to the upper strained InGaAs layer without short circuit to the second layer. An (NH₄)₂S passivation technique was used to minimize the interface state density and to enable gate control through a SiO₂ gate oxide. Below 120 K the transistor shows distinct tunnel effects. The drain current has a negative differential resistance at high gate voltages with a peak to valley ratio of up to 3.7, whereas at low gate voltages a sudden increase of the drain current by a factor of 2.8 can be observed at a certain gate voltage.