VMEbus International Trade Association. American National Standard for VME64

VMEbus International Trade Association, 1995. — 305 p.The VME64 specification establishes a framework for 8-, 16-, 32, and 64-bit parallel-bus computer architectures that can implement single and multiprocessor systems. It is based on the VMEbus specification released by the VMEbus Manufacturers Group (now VITA) in August of 1982. This bus includes the initial four basic subbuses: (1) data transfer bus, (2) priority interrupt bus, (3) arbitration bus, and (4) utility bus. Other architectures with other subbuses are possible within this VME framework.
The data transfer bus will support 8-, 16-, 32-, and 64-bit data transfers in multiplexed and non multiplexed form. The transfer protocols are asynchronous with varying degrees of handshaking dependent on the speeds required. The priority interrupt subsystem provides real-time interrupt services to the system. The allocation of bus mastership is performed by the arbitration subsystem which allows the implementation of several prioritization algorithms. The utility bus provides the system with power plus power-up and power-down synchronization. The mechanical specifications of boards, backplanes, subracks, and enclosures are based on IEC 297 and IEEE 1101.1 specifications, also known as the Eurocard form factor. Additional standards exist that can be used as sub-busses to this architecture for data transfers transactions, peripheral interfaces and intra-crate communications among compatible modules.