New York: Morgan Kaufmann, 2009. — 971 p.
This book provides broad and comprehensive coverage of the entire EDA flow. EDA/VLSI practitioners and researchers in need of fluency in an "adjacent" field will find this an invaluable reference to the basic EDA concepts, principles, data structures, algorithms, and architectures for the design, verification, and test of VLSI circuits. Anyone who needs to learn the concepts, principles, data structures, algorithms, and architectures of the EDA flow will benefit from this book.
In the Classroom.
About the Editors.
Charles E. Stroud, Lang-Terng (L.-T.) Wang, and Yao-Wen Chang.
Fundamentals of CMOS design.
Xinghao Chen and Nur A. Touba.
Design for testability.
Laung-Terng (L.-T.) Wang.
Fundamentals of algorithms.
Chung-Yang (Ric) Huang, Chao-Yue Lai, and Kwang-Ting (Tim) Cheng.
Electronic system-level design and high-level synthesis.
Jianwen Zhu and Nikil Dutt.
Logic synthesis in a nutshell.
Jie-Hong (Roland) Jiang and Srinivas Devadas.
Test synthesis.
Laung-Terng (L.-T.) Wang, Xiaoqing Wen, and Shianling Wu.
Logic and circuit simulation.
Jiun-Lang Huang, Cheng-Kok Koh, and Stephen F. Cauley.
Functional verification.
Hung-Pin (Charles) Wen, Li-C. Wang, and Kwang-Ting (Tim) Cheng.
Floorplanning.
Tung-Chieh Chen and Yao-Wen Chang.
Placement.
Chris Chu.
Global and detailed routing.
Huang-Yu Chen and Yao-Wen Chang.
Synthesis of clock and power/ground networks.
Cheng-Kok Koh, Jitesh Jain, and Stephen F. Cauley.
Fault Simulation and Test Generation.
James C.-M. Li and Michael S. Hsiao.